Invention Grant
US09437681B2 Dual channel FinFET CMOS device with common strain-relaxed buffer and method for manufacturing thereof
有权
具有普通应变松弛缓冲器的双通道FinFET CMOS器件及其制造方法
- Patent Title: Dual channel FinFET CMOS device with common strain-relaxed buffer and method for manufacturing thereof
- Patent Title (中): 具有普通应变松弛缓冲器的双通道FinFET CMOS器件及其制造方法
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Application No.: US14709696Application Date: 2015-05-12
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Publication No.: US09437681B2Publication Date: 2016-09-06
- Inventor: Seung Hun Lee , Geert Eneman
- Applicant: IMEC VZW , Samsung Electronics Co. Ltd.
- Applicant Address: BE Leuven KR Gyeonggi-do
- Assignee: IMEC VZW,Samsung Electronics Co. Ltd.
- Current Assignee: IMEC VZW,Samsung Electronics Co. Ltd.
- Current Assignee Address: BE Leuven KR Gyeonggi-do
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: EP14178465 20140725
- Main IPC: H01L21/70
- IPC: H01L21/70 ; H01L29/10 ; H01L27/092 ; H01L29/78 ; H01L21/8238 ; H01L29/417
Abstract:
A CMOS semiconductor FinFET device and a method for manufacturing a CMOS semiconductor FinFET device are disclosed. The device may comprise an nFinFET and a pFinFET having a channel region comprising Ge on a common strain-relaxed buffer layer comprising SiGe. The concentration of Ge in the channel regions is higher than the concentration of Ge in the strain-relaxed buffer layer. The device further comprises a source/drain region for the nFinFET, the source/drain region comprising SiGe; and a source/drain region for the pFinFET, the second source/drain region comprising Ge.
Public/Granted literature
- US20160027876A1 Dual Channel FinFET CMOS Device with Common Strain-Relaxed Buffer and Method for Manufacturing Thereof Public/Granted day:2016-01-28
Information query
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