Invention Grant
- Patent Title: Oxide terminated trench MOSFET with three or four masks
- Patent Title (中): 具有三个或四个掩模的氧化物端接沟槽MOSFET
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Application No.: US14965798Application Date: 2015-12-10
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Publication No.: US09443928B2Publication Date: 2016-09-13
- Inventor: Sik Lui , Anup Bhalla
- Applicant: Alpha and Omega Semiconductor Incorporated
- Applicant Address: US CA Sunnyvale
- Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
- Current Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
- Current Assignee Address: US CA Sunnyvale
- Agency: JDI Patent
- Agent Joshua D. Isenberg
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/76 ; H01L29/06 ; H01L29/423 ; H01L29/66 ; H01L21/762 ; H01L21/308 ; H01L21/31 ; H01L21/3213 ; H01L27/088 ; H01L29/08 ; H01L29/40 ; H01L29/417 ; H01L29/45

Abstract:
An oxide termination semiconductor device may comprise a plurality of gate trenches, a gate runner, and an insulator termination trench. The gate trenches are located in an active region. Each gate trench includes a conductive gate electrode. The insulator termination trench is located in a termination region that surrounds the active region. The insulator termination trench is filled with an insulator material to form an insulator termination for the semiconductor device.
Public/Granted literature
- US20160099308A1 OXIDE TERMINATED TRENCH MOSFET WITH THREE OR FOUR MASKS Public/Granted day:2016-04-07
Information query
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