Invention Grant
- Patent Title: Electric connection element manufacturing method
- Patent Title (中): 电连接元件制造方法
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Application No.: US14838976Application Date: 2015-08-28
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Publication No.: US09460960B2Publication Date: 2016-10-04
- Inventor: Kilian Piettre , Pierre Fau , Jeremy Cure , Bruno Chaudret
- Applicant: STMicroelectronics (Tours) SAS , Centre National de la Recherche Scientifique—CNRS
- Applicant Address: FR Tours FR Paris
- Assignee: STMICROELECTRONICS (TOURS) SAS,Centre National de la Recherche Scientifique-CNRS
- Current Assignee: STMICROELECTRONICS (TOURS) SAS,Centre National de la Recherche Scientifique-CNRS
- Current Assignee Address: FR Tours FR Paris
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1458195 20140902
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/532 ; H01L21/288

Abstract:
A surface of a silicon substrate is coated with a silicon oxide layer. A manganese silicate layer is then deposited on the silicon oxide layer using a process of performing at least one step of dipping the substrate into a manganese amidinate solution. A copper layer is then deposited on the manganese silicate layer using a process of performing a step of dipping the substrate into a copper amidinate solution. An anneal is performed to stabilize one or both of the manganese silicate layer and copper layer.
Public/Granted literature
- US20160064278A1 ELECTRIC CONNECTION ELEMENT MANUFACTURING METHOD Public/Granted day:2016-03-03
Information query
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