A semiconductor integrated circuit device includes a semiconductor substrate; a plurality of word lines extending parallel to one another on the semiconductor substrate; a plurality of bit lines extending parallel to one another on the semiconductor substrate and arranged to intersect the word lines, thereby delimiting a plurality of crossing regions and a plurality of unit memory cells; a plurality of gate electrodes formed to control respective pairs of unit memory cells adjacent to each other with the word lines interposed therebetween and to contact corresponding word lines on one sides of the crossing regions; storage node contacts respectively formed in spaces of the unit memory cells; and a plurality of bit line contacts formed to contact the respective bit lines on one sides of the crossing regions.