Invention Grant
US09465611B2 Processor execution unit with configurable SIMD functional blocks for complex number operations
有权
处理器执行单元,具有可配置的SIMD功能块,用于复杂数字操作
- Patent Title: Processor execution unit with configurable SIMD functional blocks for complex number operations
- Patent Title (中): 处理器执行单元,具有可配置的SIMD功能块,用于复杂数字操作
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Application No.: US10956091Application Date: 2004-10-04
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Publication No.: US09465611B2Publication Date: 2016-10-11
- Inventor: Mark Taunton , Andrew Jon Dawson
- Applicant: Mark Taunton , Andrew Jon Dawson
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Sterne, Kessler, Goldstein & Fox PLLC
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F7/48

Abstract:
Methods and systems for executing SIMD instructions that efficiently implement new SIMD instructions and conventional existing SIMD MAC-type instructions, while avoiding replication of functions in order to keep the size of the logic circuit size to as low a level as can reasonably be achieved. An instruction unit executes Single Instruction Multiple Data instructions, including instructions acting on operands representing complex numbers. The instruction unit includes functional blocks that are commonly utilized to execute a plurality of the instructions, wherein the plurality of instructions utilize various individual functional blocks in various combinations with one another. The plurality of instructions is optionally executed in a pipeline fashion.
Public/Granted literature
- US20050193185A1 Processor execution unit for complex operations Public/Granted day:2005-09-01
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