An embodiment of the invention provides a liquid crystal display (LCD) device including a pixel array, a timing controller to output a clock signal and a gate driver. The gate driver receives the clock signal to control rows of the pixel array to be turned on or turned off. The gate driver includes a first shift register coupled to a first row of the pixel array, and a second shift register coupled to a second row of the pixel array. When the first row is determined to be skipped, the first shift register outputs a first voltage level to the first row, and when the second row is to be scanned, the second shift register outputs a second voltage level, wherein the first voltage level is between the second voltage level and a third voltage level which maintains a previously written display data.