Invention Grant
- Patent Title: Conductor pattern forming method, and semiconductor device manufacturing method
- Patent Title (中): 导体图案形成方法和半导体器件制造方法
-
Application No.: US14564622Application Date: 2014-12-09
-
Publication No.: US09466485B2Publication Date: 2016-10-11
- Inventor: Keita Torii
- Applicant: CANON KABUSHIKI KAISHA
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Canon U.S.A., Inc. IP Division
- Priority: JP2013-255211 20131210
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461 ; H01L21/027 ; H01L27/146 ; H01L21/3213 ; H01L21/311

Abstract:
A conductor pattern forming method includes forming, on a conductor film, a laminated film including a first layer thinner than the conductor film, a second layer thicker than the first layer, and a third layer thinner than the second layer, which layers are laminated in order from the conductor film side. A first mask is formed from the third layer by dry-etching the third layer using a photoresist mask formed on the laminated film. A second mask is formed from the second layer by dry-etching the second layer using the first mask. The conductor film is exposed by dry-etching the first layer using the second mask. A conductor pattern is formed from the conductor film by dry-etching the conductor film using the second mask.
Public/Granted literature
- US20150162375A1 CONDUCTOR PATTERN FORMING METHOD, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2015-06-11
Information query
IPC分类: