Invention Grant
- Patent Title: Interconnect structure for an integrated circuit and method of fabricating an interconnect structure
- Patent Title (中): 用于集成电路的互连结构和制造互连结构的方法
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Application No.: US14557111Application Date: 2014-12-01
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Publication No.: US09466563B2Publication Date: 2016-10-11
- Inventor: Yann Mignot , Terry Spooner , James John Kelly
- Applicant: STMicroelectronics, Inc. , International Business Machines Corporation
- Applicant Address: US TX Coppell US NY Armonk
- Assignee: STMICROELECTRONICS, INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: STMICROELECTRONICS, INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US TX Coppell US NY Armonk
- Agency: Gardere Wynne Sewell LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/522 ; H01L23/528 ; H01L23/532 ; H01L21/768 ; H01L21/311 ; H01L21/288
Abstract:
An integrated circuit includes first and second metallization levels. The first metallization level includes a first metal routing path. The second metallization level includes a dielectric layer having a via opening formed therein extending vertically through the dielectric layer to reach a top surface of the first metal routing path. A metal plug is deposited at a bottom of the via opening in direct contact with the first metal routing path. A remaining open area of the via opening is filled with a metal material to define a second metal routing path. The metal plug is formed of cobalt or an alloy including cobalt, and has an aspect ratio of greater than 0.3.
Public/Granted literature
- US20160155701A1 INTERCONNECT STRUCTURE FOR AN INTEGRATED CIRCUIT AND METHOD OF FABRICATING AN INTERCONNECT STRUCTURE Public/Granted day:2016-06-02
Information query
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