Invention Grant
- Patent Title: Forming low parasitic trim gate last MOSFET
- Patent Title (中): 形成低寄生修剪栅极最后一个MOSFET
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Application No.: US14662521Application Date: 2015-03-19
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Publication No.: US09472654B2Publication Date: 2016-10-18
- Inventor: Effendi Leobandung
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Fusheng Xu; Stephen R. Yoder
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/417 ; H01L29/423 ; H01L29/51 ; H01L21/28 ; H01L21/8234

Abstract:
A method for making a fin MOSFET with substantially reduced parasitic capacitance and/or resistance is provided. The fin MOSFET includes: a patterned fin structure on a substrate, the substrate including a first semiconductor layer; an epitaxy layer covering the substrate and a first portion of the fin structure, the first portion of the fin structure being doped to be integrated with the epitaxy layer, wherein a source and drain region is formed in the epitaxy layer; a metal gate high-k structure covering a second portion of the fin structure; a nitride structure covering the metal gate high-k structure; an oxide spacer structure enclosing the metal gate high-k structure and the nitride structure; and a metal contact structure for the source and drain region.
Public/Granted literature
- US20160276466A1 FORMING LOW PARASITIC TRIM GATE LAST MOSFET Public/Granted day:2016-09-22
Information query
IPC分类: