Invention Grant
- Patent Title: Semiconductor packaging structure having stacked seed layers
- Patent Title (中): 具有层叠种子层的半导体封装结构
-
Application No.: US14619404Application Date: 2015-02-11
-
Publication No.: US09478512B2Publication Date: 2016-10-25
- Inventor: Yu-Shan Hu
- Applicant: DAWNING LEADING TECHNOLOGY INC.
- Applicant Address: TW Miao-Li
- Assignee: DAWNING LEADING TECHNOLOGY INC.
- Current Assignee: DAWNING LEADING TECHNOLOGY INC.
- Current Assignee Address: TW Miao-Li
- Agency: Hauptman Ham, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A semiconductor packaging structure includes a chip, a metal barrier layer, a dielectric layer and two metal seed layers. The chip has a top surface, connection pads on the top surface, and a passivation layer on the top surface and partly covering the connection pads. The metal barrier layer is disposed on each of the connection pads; the dielectric layer is disposed on the passivation layer and the metal barrier layer, and has through holes to expose the metal barrier layer. The first of the metal seed layers is disposed on the dielectric layer and the exposed metal barrier layer, while the second metal seed layer is disposed on the first metal seed layer. Therefore, the metal barrier layer can effectively prevent damage to the connection pads of the chip during the manufacturing process.
Public/Granted literature
- US20160233182A1 SEMICONDUCTOR PACKAGING STRUCTURE AND MANUFACTURING METHOD FOR THE SAME Public/Granted day:2016-08-11
Information query
IPC分类: