Invention Grant
US09478550B2 Arrays of vertically-oriented transistors, and memory arrays including vertically-oriented transistors
有权
垂直取向晶体管阵列，以及包括垂直取向晶体管的存储阵列
- Patent Title: Arrays of vertically-oriented transistors, and memory arrays including vertically-oriented transistors
- Patent Title (中): 垂直取向晶体管阵列，以及包括垂直取向晶体管的存储阵列
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Application No.: US13595854Application Date: 2012-08-27
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Publication No.: US09478550B2Publication Date: 2016-10-25
- Inventor: Kamal M. Karda , Shyam Surthi , Wolfgang Mueller , Sanh D. Tang
- Applicant: Kamal M. Karda , Shyam Surthi , Wolfgang Mueller , Sanh D. Tang
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L27/105
- IPC: H01L27/105 ; H01L27/10 ; H01L27/108 ; H01L21/765
Abstract:
An array includes vertically-oriented transistors. The array includes rows of access lines and columns of data/sense lines. Individual of the rows include an access line interconnecting transistors in that row. Individual of the columns include a data/sense line interconnecting transistors in that column. The array includes a plurality of conductive lines which individually extend longitudinally parallel and laterally between immediately adjacent of the data/sense lines. Additional embodiments are disclosed.
Public/Granted literature
- US20140054718A1 Arrays of Vertically-Oriented Transistors, And Memory Arrays Including Vertically-Oriented Transistors Public/Granted day:2014-02-27
Information query
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