Invention Grant
US09478652B1 Monolithic integrated circuit (MMIC) structure having composite etch stop layer and method for forming such structure
有权
具有复合蚀刻停止层的单片集成电路(MMIC)结构及其形成方法
- Patent Title: Monolithic integrated circuit (MMIC) structure having composite etch stop layer and method for forming such structure
- Patent Title (中): 具有复合蚀刻停止层的单片集成电路(MMIC)结构及其形成方法
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Application No.: US14683812Application Date: 2015-04-10
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Publication No.: US09478652B1Publication Date: 2016-10-25
- Inventor: Adrian D. Williams
- Applicant: Raytheon Company
- Applicant Address: US MA Waltham
- Assignee: Raytheon Company
- Current Assignee: Raytheon Company
- Current Assignee Address: US MA Waltham
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/778 ; H01L29/66 ; H01L29/47 ; H01L21/768 ; H01L21/311 ; H01L23/31 ; H01L29/205 ; H01L23/66

Abstract:
A method for forming a semiconductor structure having a transistor device with a control electrode for controlling a flow of carriers between a first electrode and a second electrode. A passivation layer is deposited over the first electrode, the second electrode and the control electrode. An etch stop layer is deposited on the passivation layer over the control electrode. The etch stop layer includes the etch stop layer comprising: a first etch stop layer on the passivation layer, a buffer layer on the first etch stop layer, and a second etch stop layer on the buffer layer. A dielectric layer is formed over the etch stop layer. A window is etched through a selected region in the dielectric layer over the control electrode, to expose a portion of the etch stop layer disposed over the control electrode. A metal layer is formed on a portion of the etch stop layer and the dielectric layer is also formed on the metal layer. A second metal layer is deposited on the portion of the dielectric layer formed on the first mentioned metal layer.
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