Invention Grant
US09483069B2 Circuit for generating bias current 有权
用于产生偏置电流的电路

Circuit for generating bias current
Abstract:
A circuit for generating a bias current is provided, including: a loop unit, which includes a first current mirror structure constituted by a first PMOS transistor and a second PMOS transistor, and a second current mirror structure constituted by a first NMOS transistor and a second NMOS transistor, where the first and second NMOS transistors operate in a sub-threshold region; an output unit, adapted to output the bias current; and an amplifying unit, which includes a first input terminal and an output terminal, where the first input terminal is connected with a source of the first NMOS transistor or a source of the second NMOS transistor, and the output terminal is connected with gates of both the first and the second PMOS transistors. The bias current output from the circuit may be not sensitive to temperatures.
Public/Granted literature
Information query
Patent Agency Ranking
0/0