Invention Grant
US09484072B1 MIS transistors configured to be placed in programmed state and erased state
有权
配置为置于编程状态和擦除状态的MIS晶体管
- Patent Title: MIS transistors configured to be placed in programmed state and erased state
- Patent Title (中): 配置为置于编程状态和擦除状态的MIS晶体管
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Application No.: US14875777Application Date: 2015-10-06
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Publication No.: US09484072B1Publication Date: 2016-11-01
- Inventor: Kenji Noda
- Applicant: NSCore, Inc.
- Applicant Address: JP Fukuoka
- Assignee: NSCore, Inc.
- Current Assignee: NSCore, Inc.
- Current Assignee Address: JP Fukuoka
- Agency: IPUSA, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C7/06
Abstract:
A nonvolatile memory device includes a pair of MIS transistors one of which is placed in a programmed state by a first program operation utilizing a hot carrier effect to store one-bit data in the pair of MIS transistors, and a control unit configured to recall the one-bit data from the pair of MIS transistors in a recall operation, to cause an unprogrammed one of the MIS transistors to be placed in a programmed state by a second program operation utilizing a hot carrier effect in response to the one-bit data recalled from the pair of MIS transistors, and to erase the programmed states of both of the MIS transistors in an erase operation.
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