A semiconductor device includes a substrate including a pad and an alignment feature disposed over the substrate, a passivation disposed over the substrate and a periphery of the pad, a post passivation interconnect (PPI) including a via portion disposed on the pad and an elongated portion receiving a conductive bump to electrically connect the pad with the conductive bump, a polymer covering the PPI, and a molding material disposed over the polymer and around the conductive bump, wherein the molding material comprises a first portion orthogonally aligned with the alignment feature and adjacent to an edge of the semiconductor device and a second portion distal to the edge of the semiconductor device, a thickness of the first portion is substantially smaller than a thickness of the second portion, thereby the alignment feature is visible through the molding material under a predetermined radiation.