Invention Grant
- Patent Title: Three-dimensional resistive memory array
- Patent Title (中): 三维电阻式存储器阵列
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Application No.: US14577937Application Date: 2014-12-19
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Publication No.: US09484389B2Publication Date: 2016-11-01
- Inventor: Dirk Wouters , Gouri Sankar Kar
- Applicant: IMEC
- Applicant Address: BE Leuven
- Assignee: IMEC
- Current Assignee: IMEC
- Current Assignee Address: BE Leuven
- Agency: Knobbe Martens Olson & Bear LLP
- Priority: EP13198989 20131220; EP14150456 20140108
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00
Abstract:
A method for manufacturing a three-dimensional resistive memory array is disclosed. The method comprises forming a repetitive sequence comprising an isolating layer, a semiconductor layer, a gate insulating layer, and a conductive layer. By performing a plurality of processing steps on the repetitive sequence a three-dimensional resistive memory array is obtained. A three-dimensional resistive memory array is further disclosed.
Public/Granted literature
- US20150179705A1 THREE-DIMENSIONAL RESISTIVE MEMORY ARRAY Public/Granted day:2015-06-25
Information query
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