Invention Grant
- Patent Title: Semiconductor device and semiconductor device manufacturing method
- Patent Title (中): 半导体器件和半导体器件制造方法
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Application No.: US14532292Application Date: 2014-11-04
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Publication No.: US09484445B2Publication Date: 2016-11-01
- Inventor: Hong-fei Lu
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi
- Agency: Rossi, Kimms & McDowell LLP
- Priority: JP2012-183092 20120822
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/32 ; H01L29/739 ; H01L29/40 ; H01L29/66 ; H01L21/761 ; H01L21/265 ; H01L21/324 ; H01L29/10

Abstract:
An n-type low lifetime adjustment region is provided in a portion inside an n− type drift region deeper than the bottom surface of a termination p-type base region or p-type guard ring from a substrate front surface, separated from the termination p-type base region and the p-type guard ring. The carrier lifetime of the n-type low lifetime adjustment region is shorter than the carrier lifetime of the n− type drift region. Because of this, it is possible to provide a reverse blocking IGBT such that it is possible to suppress both a high temperature reverse leakage current and an increase in turn-off loss, while suppressing deterioration in the trade-off relationship between the turn-off loss and the on-state voltage.
Public/Granted literature
- US20150054025A1 SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2015-02-26
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