Invention Grant
- Patent Title: Zero-current POR circuit
- Patent Title (中): 零电流POR电路
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Application No.: US14389407Application Date: 2014-03-19
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Publication No.: US09484910B2Publication Date: 2016-11-01
- Inventor: Rifeng Mai
- Applicant: CAPITAL MICROELECTRONICS CO., LTD
- Applicant Address: CN Beijing
- Assignee: Capital Microelectronics Co., Ltd.
- Current Assignee: Capital Microelectronics Co., Ltd.
- Current Assignee Address: CN Beijing
- Agency: Buchanan Ingersoll & Rooney PC
- Priority: CN201410038090 20140126
- International Application: PCT/CN2014/073712 WO 20140319
- International Announcement: WO2015/109649 WO 20150730
- Main IPC: H03K17/22
- IPC: H03K17/22 ; H03K17/284 ; H03K3/037

Abstract:
A power-on reset (POR) circuit includes an RC circuit; a Schmitt trigger, an inverter, and a first PMOS tube. A power supply voltage charges a capacitor through the RC circuit. When a voltage of the capacitor reaches a first threshold, the Schmitt trigger reverses, a first level is output. The POR circuit includes a discharge circuit used to detect a glitch of the power supply voltage, and output a first signal to an input end of the Schmitt trigger when the glitch is detected. The first signal allows the Schmitt trigger to reverse again to output a second level, so as to turn off the first PMOS tube through the inverting amplifier. When the power supply voltage rises along an oblique line again, the Schmitt trigger reverses, and the first level is output, so as to reset the system where the circuit is.
Public/Granted literature
- US20160261264A1 ZERO-CURRENT POR CIRCUIT Public/Granted day:2016-09-08
Information query
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