Invention Grant
- Patent Title: Semiconductor device having compliant and crack-arresting interconnect structure
- Patent Title (中): 半导体器件具有兼容性和防裂性互连结构
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Application No.: US15053453Application Date: 2016-02-25
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Publication No.: US09496208B1Publication Date: 2016-11-15
- Inventor: Gregory Thomas Ostrowicki
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Frank D. Cimino
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L25/07 ; H01L23/00

Abstract:
A power converter (300) has a first transistor chip (310) conductively stacked on top of a second transistor chip (320) attached to a substrate (301). A first metallic clip (360) has a plate portion (360a) and a ridge portion (360c) bent at an angle from the plate portion. The plate portion is attached to the terminal of the first transistor chip opposite the second transistor chip. The ridge portion extends to the substrate is and is configured as a plurality of parallel straight fingers (360d). Each finger is discretely attached to the substrate using attachment material (361), for instance solder, and operable as a spring-line cantilever to accommodate, under a force lying in the plane of the substrate, elastic elongation based upon inherent material characteristics.
Information query
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