Invention Grant
- Patent Title: Graded buffer epitaxy in aspect ratio trapping
- Patent Title (中): 渐变缓冲外延在纵横比捕获
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Application No.: US14974590Application Date: 2015-12-18
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Publication No.: US09496347B1Publication Date: 2016-11-15
- Inventor: Cheng-Wei Cheng , Amlan Majumdar , Kuen-Ting Shiu , Jeng-Bang Yau
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Louis Percello
- Main IPC: H01L29/15
- IPC: H01L29/15 ; H01L21/00 ; H01L29/20 ; H01L27/088 ; H01L21/8234

Abstract:
A method of forming a semiconductor device includes: providing a patterned structure comprising a silicon substrate and dielectric stacks deposited on the silicon substrate, the dielectric stacks forming trenches exposing a plurality of surface portions of the substrate within the trenches; forming one or more epitaxial buffer layers within the trenches on the exposed surface portions of the substrate; and growing a semiconductor material on the epitaxial buffer layer that is the furthest away from the substrate; wherein each of the one or more epitaxial buffer layers and the semiconductor material has less than about 3% lattice mismatch to the layer immediately beneath the one or more epitaxial buffer layer and the semiconductor material.
Information query
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