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US09496354B2 Semiconductor devices with dummy gate structures partially on isolation regions 有权
具有虚拟栅极结构的半导体器件部分地在隔离区域上

Semiconductor devices with dummy gate structures partially on isolation regions
Abstract:
One illustrative method disclosed herein includes removing the sidewall spacers and a gate cap layer so as to thereby expose an upper surface and sidewalls of a sacrificial gate structure, forming an etch stop layer above source/drain regions of a device and on the sidewalls and upper surface of the sacrificial gate structure, forming a first layer of insulating material above the etch stop layer, removing the sacrificial gate structure so as to define a replacement gate cavity that is laterally defined by portions of the etch stop layer, forming a replacement gate structure in the replacement gate cavity, and forming a second gate cap layer above the replacement gate structure.
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