Invention Grant
US09496368B2 Partial spacer for increasing self aligned contact process margins
有权
用于增加自对准接触工艺余量的部分间隔件
- Patent Title: Partial spacer for increasing self aligned contact process margins
- Patent Title (中): 用于增加自对准接触工艺余量的部分间隔件
-
Application No.: US14576436Application Date: 2014-12-19
-
Publication No.: US09496368B2Publication Date: 2016-11-15
- Inventor: Emre Alptekin , Ravikumar Ramachandran , Viraj Y. Sardesai , Reinaldo A. Vega
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Steven J. Meyers
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/417 ; H01L21/28 ; H01L21/283
Abstract:
A semiconductor structure is provided. The semiconductor includes a gate stack on a substrate. The semiconductor includes a first set of sidewall spacers on opposite sidewalls of the gate stack. The semiconductor includes a flowable dielectric layer on the substrate, covering at least a portion of the first set of sidewall spacers. The semiconductor includes a second set of sidewall spacers next to the first set of sidewall spacers covering an upper portion thereof, the second set of sidewall spacers are directly on top of the flowable dielectric layer. The semiconductor includes a contact next to at least one of the second set of sidewall spacers.
Public/Granted literature
- US20160181392A1 PARTIAL SPACER FOR INCREASING SELF ALIGNED CONTACT PROCESS MARGINS Public/Granted day:2016-06-23
Information query
IPC分类:
