Invention Grant
- Patent Title: Packaging structure
- Patent Title (中): 包装结构
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Application No.: US13981123Application Date: 2012-01-20
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Publication No.: US09497862B2Publication Date: 2016-11-15
- Inventor: Lei Shi , Yujuan Tao , Guohua Gao , Guoji Yang , Honglei Li , Haijun Shen
- Applicant: Lei Shi , Yujuan Tao , Guohua Gao , Guoji Yang , Honglei Li , Haijun Shen
- Applicant Address: CN Nantong
- Assignee: Nantong Fujitsu Microelectronics Co., Ltd.
- Current Assignee: Nantong Fujitsu Microelectronics Co., Ltd.
- Current Assignee Address: CN Nantong
- Agency: RatnerPrestia
- Priority: CN201110032264 20110130; CN201110032390 20110130; CN201110032402 20110130; CN201120032087 20110130; CN201120032108 20110130
- International Application: PCT/CN2012/070629 WO 20120120
- International Announcement: WO2012/100721 WO 20120802
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H05K1/18 ; H01L21/56 ; H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L25/16 ; H01L23/00
Abstract:
The present invention relates a packaging structure including: a carrier board and a cementing layer on the surface of the carrier board; chips and passive devices having functional side thereof attached to the cementing layer; and a sealing material layer for packaging and curing, the sealing material being formed on the carrier board on the side attached to the chips and the passive devices. The present invention integrates chips and passive devices and then packages the chips and the passive devices together, and is therefore a packaged product having not single-chip functionality but integrated-system functionality. The present invention is highly integrated, reduces interfering factors such as system-internal electric resistance and inductance, and accommodates growing demand for lighter, thinner, shorter, and smaller semiconductor packaging.
Public/Granted literature
- US20130301228A1 PACKAGING STRUCTURE Public/Granted day:2013-11-14
Information query
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