A pre-array temporary placement area A2 and a post-return temporary placement area A3 are set along with a lower receiving area A1. Temporary placement positions TP for lower receiving pins 22 in the pre-array temporary placement area A2 and the post-return temporary placement area A3 are previously assigned in consideration of requirements for preventing occurrence of interference between the lower receiving pins 22, which would otherwise occur during transfer of the lower receiving pins 22, and in accordance with array positions AP of the lower receiving pins 22 in the lower receiving area A1. Further, a transfer sequence is set in accordance with array positions AP.