Invention Grant
- Patent Title: FinFET transistor with fin back biasing
- Patent Title (中): FinFET晶体管具有鳍背偏置
-
Application No.: US14574497Application Date: 2014-12-18
-
Publication No.: US09502542B2Publication Date: 2016-11-22
- Inventor: Tsung-Yao Wen , Sai-Hooi Yeong , Sheng-Chen Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/66

Abstract:
A FinFET having fin back biasing and methods of forming the same are disclosed. The FinFET includes a substrate and a fin over the substrate. The fin includes a source region, a drain region, a channel region, and a biasing region. The source and drain regions sandwich the channel region. The channel region and the biasing region sandwich one of the source and drain regions. The FinFET further includes a gate over the substrate. The gate engages the fin adjacent to the channel region, thereby forming a field effect transistor (FET). The biasing region is configured to bias the FET body effect when a voltage is applied to the biasing region. From a cross sectional view, the source region and the biasing region each have a substantially rectangular profile, wherein the source region is taller and wider than the biasing region.
Public/Granted literature
- US20160181404A1 FINFET TRANSISTOR WITH FIN BACK BIASING Public/Granted day:2016-06-23
Information query
IPC分类: