Invention Grant
- Patent Title: Semiconductor apparatus with variable resistor having tapered double-layered sidewall spacers and method for fabricating the same
- Patent Title (中): 具有锥形双层侧壁间隔物的可变电阻器的半导体装置及其制造方法
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Application No.: US14566305Application Date: 2014-12-10
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Publication No.: US09502648B2Publication Date: 2016-11-22
- Inventor: Jae Sung Yoon
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: I P & T Group LLP
- Priority: KR10-2014-0120373 20140911
- Main IPC: H01L45/00
- IPC: H01L45/00 ; H01L27/24 ; H01L27/22
Abstract:
A method for fabricating a semiconductor apparatus includes forming a variable resistor region, and forming a spacer having a top linewidth and a bottom linewidth substantially equal to each other in the variable resistor region. The forming of the spacer includes forming a first insulating layer in the variable resistor region through a first method, forming a second insulating layer along a surface of the first insulating layer in the variable resistor region through a second method for providing step coverage superior to the first method, and etching the first and second insulating layers.
Public/Granted literature
- US20160079525A1 SEMICONDUCTOR APPARATUS AND METHOD FOR FABRICATING THE SAME Public/Granted day:2016-03-17
Information query
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