Invention Grant
- Patent Title: Die-tracing in integrated circuit manufacturing and packaging
- Patent Title (中): 集成电路制造和封装中的跟踪
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Application No.: US14030807Application Date: 2013-09-18
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Publication No.: US09508653B2Publication Date: 2016-11-29
- Inventor: Kewei Zuo , Wen-Yao Chang , Chien Rhone Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L23/544 ; H01L21/683
Abstract:
A method includes recording a wafer ID and a location ID of a device die in a database, and bonding the device die over a package substrate, wherein the device die and the package substrate are disposed in a package. A package ID is on the package. A mapping is established to link the wafer ID and the location ID of the device die to the package ID.
Public/Granted literature
- US20150079734A1 Die-Tracing in Integrated Circuit Manufacturing and Packaging Public/Granted day:2015-03-19
Information query
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