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US09520547B2 Chip mode isolation and cross-talk reduction through buried metal layers and through-vias 有权
通过掩埋金属层和通孔进行芯片模式隔离和串扰降低

Chip mode isolation and cross-talk reduction through buried metal layers and through-vias
Abstract:
A method for fabricating a chip surface base includes preparing a first substrate, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias, preparing a second substrate, bonding the first and second substrates and exposing the metal fillings. A method for fabricating a chip surface base includes preparing a first and second substrate, depositing a metal on at least one of the first and second substrates, bonding the first and second substrates, preparing a plurality of vias in the first substrate, depositing metal fillings into the plurality of vias and exposing the metal fillings. A chip surface base device includes a first substrate, a second substrate, a metal layer disposed between the first and second substrates and a plurality vias disposed on the first substrate.
Abstract(Chinese):

制造芯片表面基底的方法包括制备第一基底，在第一基底中制备多个通孔，将金属填充物沉积到多个通孔中，制备第二基底，粘合第一和第二基底并暴露金属填充物。 一种用于制造芯片表面基底的方法，包括制备第一和第二基底，在第一和第二基底中的至少一个上沉积金属，粘合第一和第二基底，在第一基底中制备多个通孔， 进入多个通孔并暴露金属填充物。 芯片表面基底器件包括第一衬底，第二衬底，设置在第一和第二衬底之间的金属层和设置在第一衬底上的多个通孔。

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