Invention Grant
- Patent Title: Monitoring and control of reference clocks to reduce bit error ratio
- Patent Title (中): 监视和控制参考时钟,以减少误码率
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Application No.: US14587477Application Date: 2014-12-31
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Publication No.: US09520965B2Publication Date: 2016-12-13
- Inventor: Shawn Barrow
- Applicant: Shawn Barrow
- Applicant Address: US MD Hanover
- Assignee: Ciena Corporation
- Current Assignee: Ciena Corporation
- Current Assignee Address: US MD Hanover
- Agency: Osha Liang LLP
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L7/02 ; H04L25/38 ; H04L1/00 ; H04L7/033 ; H04L1/20 ; H03L7/091 ; H03M1/06

Abstract:
A method for reducing a frequency error, including: applying a plurality of dither values to a local reference clock over a first time interval; sampling, during the first time interval and using the local reference clock, a first plurality of data values received over an asynchronous link, where the first plurality of data values are transmitted over the asynchronous link based on a remote reference clock; tracking a plurality of errors from sampling the first plurality of data values; and adjusting, based on the plurality of errors, a frequency of the local reference clock to reduce the frequency error between the local reference clock and the remote reference clock.
Public/Granted literature
- US20160191202A1 MONITORING AND CONTROL OF REFERENCE CLOCKS TO REDUCE BIT ERROR RATIO Public/Granted day:2016-06-30
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