Invention Grant
- Patent Title: Architecture and method to determine leakage impedance and leakage voltage node
- Patent Title (中): 确定泄漏阻抗和漏电节点的结构和方法
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Application No.: US13756101Application Date: 2013-01-31
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Publication No.: US09523730B2Publication Date: 2016-12-20
- Inventor: Lawrence C. Streit
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Patent Capital Group
- Main IPC: G01R27/00
- IPC: G01R27/00 ; G01R31/02 ; G06F17/00 ; G01R31/36 ; G01R19/25

Abstract:
A circuit, system, machine-readable storage medium and method for detecting the leakage impedance in a voltage source is described. The method for identifying a presence of a leakage path in a multi-cell floating voltage source may include supplying a current to a node of the floating voltage source and sampling the voltage of the floating voltage source using a pair of amplifiers connecting in inverting configurations. The method may include sampling a reference ground potential using a reference amplifier connected in an inverting configuration. Each of the amplifiers may output an output signal. The method may include adjusting the current supplied to the node of the floating voltage source and resampling the voltage of the floating voltage source and the reference ground potential. The value of the leakage impedance may be calculated using the sampled and resampled values. The measurements may be performed independent of the battery voltage.
Public/Granted literature
- US20130151175A1 ARCHITECTURE AND METHOD TO DETERMINE LEAKAGE IMPEDANCE AND LEAKAGE VOLTAGE NODE Public/Granted day:2013-06-13
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