The disclosure is applied to a field of communication technologies and relates to a method for controlling multiple CAN interfaces through a single SPI bus. The method includes: when a reception mailbox of any of a plurality of CAN chips finishes receiving data on a CAN bus, triggering an interrupt by the CAN chip to deliver an interrupt signal; configuring the CAN chip triggering the interrupt through the SPI bus to disable interrupts in the CAN chip, so that the CAN chip exits the interrupt; inquiring the data received by the reception mailboxes of each CAN chip triggering the interrupt, reading the data into a memory buffer of an MCU through the SPI bus, setting a data identifier in the memory buffer of the MCU, and enabling interrupts in the CAN chip triggering the interrupt to allow the CAN chip triggering the interrupt to continue receiving data; and detecting whether the data identifier is present in the memory buffer of the MCU by an application program on the MCU, and copying the data from the memory buffer of the MCU to a memory buffer of the application program if the data identifier is present in the memory buffer of the MCU; otherwise, returning a result as a failure. The invention reads the data into the MCU upon interrupts generated by CAN chips, thereby reducing costs without affecting communication.