A ferroelectric random access memory includes a memory cell matrix constituted by a plurality of 1T1C type memory cells. Each of the plurality of memory cells is connected to a j bit line and one pair of k word lines and k plate lines. A plate line drive circuit selectively applies one of a first potential and a second potential having a higher potential level than the first potential to one plate line of the k plate lines. An equalizing circuit performs an equalizing process in which the first potential is applied to each of the j bit lines. The plate line drive circuit applies a third potential having a potential level between the first and second potentials to the one plate line, before starting the equalizing process by the equalizing circuit.