Invention Grant
- Patent Title: Serial/parallel control, separate tap, master reset synchronizer for tap domains
- Patent Title (中): 串行/并行控制，分接头，主复位同步器
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Application No.: US14937361Application Date: 2015-11-10
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Publication No.: US09535122B2Publication Date: 2017-01-03
- Inventor: Lee D. Whetsel
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: G01R31/3177
- IPC: G01R31/3177 ; G01R31/317 ; G01R31/3185 ; G06F11/36 ; G01R31/28
Abstract:
An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG interface and is thus more applicable than conventional JTAG interfaces on an integrated circuit where the availability of pins is limited. The interface may be used for a variety of serial communication operations such as, but not limited to, serial communication related integrated circuit test, emulation, debug, and/or trace operations.
Public/Granted literature
- US20160077155A1 OPTIMIZED JTAG INTERFACE Public/Granted day:2016-03-17
Information query
