Invention Grant
- Patent Title: Multi-hierarchy interconnect system and method for cache system
- Patent Title (中): 多层互连系统和缓存系统的方法
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Application No.: US14254898Application Date: 2014-04-17
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Publication No.: US09535832B2Publication Date: 2017-01-03
- Inventor: Hsilin Huang
- Applicant: MediaTek Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: MediaTek Singapore Pte. Ltd.
- Current Assignee: MediaTek Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent Winston Hsu; Scott Margo
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/06 ; G06F12/08

Abstract:
A multi-hierarchy interconnect system for a cache system having a tag memory and a data memory includes an address interconnect scheduling device and a data interconnect scheduling device. The address interconnect scheduling device performs a tag bank arbitration to schedule address requests to a plurality of tag banks of the tag memory. The data interconnect scheduling device performs a data bank arbitration to schedule data requests to a plurality of data banks of the data memory. Besides, a multi-hierarchy interconnect method for a cache system having a tag memory and a data memory includes: performing a tag bank arbitration to schedule address requests to a plurality of tag banks of the tag memory, and performing a data bank arbitration to schedule data requests to a plurality of data banks of the data memory.
Public/Granted literature
- US20140325153A1 MULTI-HIERARCHY INTERCONNECT SYSTEM AND METHOD FOR CACHE SYSTEM Public/Granted day:2014-10-30
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