A liquid crystal array substrate includes a number of pixels, each pixel includes a main region, a first sub-region, and a second sub-region. The main region includes a first thin film transistor (TFT), the first sub-region comprises a second TFT, and the second sub-region comprises a third TFT. Gates of the first TFT, the second TFT, and the third TFT of each pixel are connected to a first scan line, a source of the first TFT is connected to a first data line, a drain of the first TFT is connected to one corresponding pixel electrode; sources of the second TFT and the third TFT are connected to a second data line, drains of the second TFT and the third TFT are respectively connected to corresponding pixel electrodes.