Invention Grant
- Patent Title: Semiconductor integrated circuit device having protective split at peripheral area of bonding pad and method of manufacturing same
- Patent Title (中): 在焊盘的周边区域具有保护性分裂的半导体集成电路装置及其制造方法
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Application No.: US14666602Application Date: 2015-03-24
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Publication No.: US09536821B2Publication Date: 2017-01-03
- Inventor: Takuro Homma , Katsuhiko Hotta , Takashi Moriyama
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2009-099689 20090416
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/50 ; H01L21/66 ; H01L23/31 ; H01L23/00 ; H01L23/482

Abstract:
In manufacturing an LSI, or semiconductor integrated circuit device, the step of assembling device (such as resin sealing step) is normally followed by a voltage-application test in an environment of high temperature (e.g., from 85 to 130° C.) and high humidity (e.g., about 80% RH). It has been found that separation of a titanium nitride anti-reflection film from an upper film and generation of cracks in the titanium nitride film at an upper surface edge part of the aluminum-based bonding pad applied with a positive voltage in the test is caused by an electrochemical reaction due to moisture incoming through the sealing resin and the like to generate oxidation and bulging of the titanium nitride film. These problems are addressed by removing the titanium nitride film over the pad in a ring or slit shape at peripheral area of the aluminum-based bonding pad.
Public/Granted literature
- US20150194381A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING SAME Public/Granted day:2015-07-09
Information query
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