Invention Grant
US09536987B2 Line-end cutting method for fin structures of FinFETs formed by double patterning technology
有权
通过双重图案化技术形成的FinFET翅片结构的线端切割方法
- Patent Title: Line-end cutting method for fin structures of FinFETs formed by double patterning technology
- Patent Title (中): 通过双重图案化技术形成的FinFET翅片结构的线端切割方法
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Application No.: US14764175Application Date: 2014-11-24
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Publication No.: US09536987B2Publication Date: 2017-01-03
- Inventor: Chunyan Yi , Ming Li
- Applicant: SHANGHAI IC R & D CENTER CO., LTD.
- Applicant Address: CN Shanghai
- Assignee: SHANGHAI IC R&D CENTER CO., LTD
- Current Assignee: SHANGHAI IC R&D CENTER CO., LTD
- Current Assignee Address: CN Shanghai
- Priority: CN201410371037 20140731
- International Application: PCT/CN2014/092014 WO 20141124
- International Announcement: WO2016/015416 WO 20160204
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/027 ; H01L21/308 ; H01L21/311

Abstract:
A line-end cutting method for fin structures of FinFETs formed by double patterning technology firstly utilizes the SiN hard mask lines to form fin structures and then performs lithography and etching processes to form line-end cuts. Since the depth of the line-end cuts is large, there is enough time and space to regulate the etching recipe so as to balance the etching rate of multiple layers including the spin-on-carbon layer, the SiN layer, the SiO2 layer and the silicon substrate, thereby forming the fin structures with line-end cuts having flatter bottom topography, preventing the formation of silicon protrusions or silicon cones during the etching process and improving the device electrical performance.
Public/Granted literature
- US20160254369A1 LINE-END CUTTING METHOD FOR FIN STRUCTURES OF FINFETS FORMED BY DOUBLE PATTERNING TECHNOLOGY Public/Granted day:2016-09-01
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