Invention Grant
- Patent Title: Power supply noise reduction circuit and power supply noise reduction method
- Patent Title (中): 电源降噪电路和电源降噪方法
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Application No.: US13883278Application Date: 2010-11-12
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Publication No.: US09537384B2Publication Date: 2017-01-03
- Inventor: Toshiyuki Sato
- Applicant: Toshiyuki Sato
- Applicant Address: JP Tokyo
- Assignee: ADVANTEST CORPORATION
- Current Assignee: ADVANTEST CORPORATION
- Current Assignee Address: JP Tokyo
- Priority: JP2010-246763 20101102
- International Application: PCT/JP2010/006657 WO 20101112
- International Announcement: WO2012/059963 WO 20120510
- Main IPC: H02M1/14
- IPC: H02M1/14

Abstract:
To provide a power supply noise reduction circuit and a power supply noise reduction method that do not require circuit elements to be increased in size and do not cause voltage drop in a power supply voltage. A power supply noise reduction circuit 10 that reduces noise included in a constant voltage output that is output from a power supply 2 to a load includes a first resistor 20 that is inserted into a power supply line L1 extending from the power supply 2 to the load, a filter 31 that is coupled to a load terminal of the first resistor 20 and outputs a first voltage that is obtained by reducing the noise from the constant voltage output, and a unity gain amplifier 32 that drives the first voltage output from the filter 31 and outputs the driven first voltage to the load terminal of the first resistor 20.
Public/Granted literature
- US20130308354A1 POWER SUPPLY NOISE REDUCTION CIRCUIT AND POWER SUPPLY NOISE REDUCTION METHOD Public/Granted day:2013-11-21
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