Invention Grant
- Patent Title: Co-designed dynamic language accelerator for a processor
- Patent Title (中): 用于处理器的共同设计的动态语言加速器
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Application No.: US14225755Application Date: 2014-03-26
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Publication No.: US09542211B2Publication Date: 2017-01-10
- Inventor: Cheng Wang , Youfeng Wu , Hongbo Rong , Hyunchul Park
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F9/45
- IPC: G06F9/45 ; G06F9/455 ; G06F13/10 ; G06F9/44

Abstract:
In an embodiment, a processor includes at least one core and a dynamic language accelerator to execute a bytecode responsive to a memory mapped input/output (MMIO) operation on a file descriptor associated with the dynamic language accelerator. The processor may block execution of native code while the dynamic language accelerator executes the bytecode. Other embodiments are described and claimed.
Public/Granted literature
- US20150277866A1 CO-DESIGNED DYNAMIC LANGUAGE ACCELERATOR FOR A PROCESSOR Public/Granted day:2015-10-01
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