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US09542211B2 Co-designed dynamic language accelerator for a processor 有权
用于处理器的共同设计的动态语言加速器

Co-designed dynamic language accelerator for a processor
Abstract:
In an embodiment, a processor includes at least one core and a dynamic language accelerator to execute a bytecode responsive to a memory mapped input/output (MMIO) operation on a file descriptor associated with the dynamic language accelerator. The processor may block execution of native code while the dynamic language accelerator executes the bytecode. Other embodiments are described and claimed.
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