Invention Grant
US09542313B2 Parallel computer system, control method of parallel computer system, information processing device, arithmetic processing device, and communication control device
有权
并行计算机系统,并行计算机系统的控制方法,信息处理装置,算术处理装置和通信控制装置
- Patent Title: Parallel computer system, control method of parallel computer system, information processing device, arithmetic processing device, and communication control device
- Patent Title (中): 并行计算机系统,并行计算机系统的控制方法,信息处理装置,算术处理装置和通信控制装置
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Application No.: US14540381Application Date: 2014-11-13
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Publication No.: US09542313B2Publication Date: 2017-01-10
- Inventor: Shinya Hiramoto , Tomohiro Inoue , Masahiro Maeda , Shun Ando , Yuta Toyoda
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2013-248582 20131129
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28 ; G06F12/08 ; G06F9/52

Abstract:
A parallel computer system includes information processing devices, each of the information processing devices including a communication control device that performs communication, a main memory that stores data, and an arithmetic processing device that is coupled to the communication control device and the main memory, the information processing devices being coupled to each other through a network by the respective communication control device, wherein the arithmetic processing device includes a cache memory and a cache controller, the cache controller that executes an atomic operation for target data on the cache memory that stores the target data when the communication control device outputs an atomic operation request that is used to request the atomic operation, the atomic operation being not divided into a smaller operation, and notifies the communication control device of a result that is obtained by executing the atomic operation on the cache memory.
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