Invention Grant
- Patent Title: Nonvolatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13787730Application Date: 2013-03-06
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Publication No.: US09543020B2Publication Date: 2017-01-10
- Inventor: Yuya Suzuki
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Main IPC: G11C16/10
- IPC: G11C16/10 ; G11C16/34 ; G11C16/04

Abstract:
A nonvolatile semiconductor memory device includes an array of memory cells arranged at the position intersecting positions of the word line and the bit line, a control signal generating circuit for carrying out a writing operation including a program for carrying out writing in the memory cell and a verification for verifying whether the data has been correctly written in the memory cell by the program, and a cell source monitoring circuit for detecting a voltage of the source line connected to the memory cell during the writing operation. The control signal generating circuit directly shifts the source line voltage at the time of program to a lower voltage necessary at the time of verification after the end of the program, based on the voltage the source line detected by the cell source monitoring circuit.
Public/Granted literature
- US20130265829A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2013-10-10
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