Invention Grant
- Patent Title: Semiconductor memory device, control method, and memory system
- Patent Title (中): 半导体存储器件,控制方法和存储器系统
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Application No.: US15057728Application Date: 2016-03-01
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Publication No.: US09543033B1Publication Date: 2017-01-10
- Inventor: Koichi Shinohara , Yoshikazu Takeyama
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G11C16/26
- IPC: G11C16/26 ; G11C16/34 ; G11C16/04 ; G11C16/10 ; G11C11/56

Abstract:
According to one embodiment, a semiconductor memory device includes a memory cell array, a first circuit, and a second circuit. The first circuit executes program and read. The program is processing for changing a threshold voltage of a memory cell to a voltage according to data. The data includes first data of a bit and second data of a bit. The program of the second data is executed after the program of the first data. The read includes measuring the threshold voltage. The second circuit manipulates a flag in accordance with execution of the program of the second data. In a case where the second data is a target of the read, the second circuit refers to the flag. In a case where the flag indicates non-execution of the program of the second data, the second circuit aborts the measuring before the measuring of the threshold voltage is completed.
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