Invention Grant
- Patent Title: Preventing over-polishing of poly gate in metal-gate CMP
- Patent Title (中): 防止金属栅极CMP中多晶硅的过度抛光
-
Application No.: US14663389Application Date: 2015-03-19
-
Publication No.: US09543212B2Publication Date: 2017-01-10
- Inventor: Pulei Zhu , Li Jiang , Xiantao Li
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend and Stockton LLP
- Priority: CN201410226155 20140526
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/8234 ; H01L21/28 ; H01L29/66 ; H01L21/8238 ; H01L21/321
Abstract:
A method for manufacturing a semiconductor device includes providing a substrate containing a front-end device that includes a first gate in a first-type transistor region and a second gate in a second-type transistor region, forming an interlayer dielectric layer on the semiconductor substrate, and planarizing the interlayer dielectric layer to expose the surface of the first and second gates. The method also includes forming a hard mask layer on the second gate, removing the first gate using the hard mask layer as a mask to form a trench, forming sequentially a work function metal layer and a metal gate layer in the trench, and removing a portion of the first work function metal layer and a portion of the metal gate layer that are higher than the interlayer dielectric layer to form a metal gate.
Public/Granted literature
- US20150340286A1 Preventing Over-Polishing of Poly Gate in Metal-Gate CMP Public/Granted day:2015-11-26
Information query
IPC分类:
