A method for manufacturing a nonvolatile memory device in accordance with an embodiment of the present invention may include providing a substrate comprising a cell region and a peripheral region, wherein the peripheral region comprises an NMOS region and a PMOS region; performing a well forming ion implantation over the substrate in the cell region and the NMOS region; performing a threshold voltage adjusting ion implantation over a surface of the substrate in the cell region and the NMOS region; forming a gate pattern comprising a floating gate electrode in the cell region and the peripheral region; and performing a junction ion implantation over a surface of the cell region, wherein the floating gate electrode may have P-type conductivity.