Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
- Patent Title (中): 半导体结构及其制造方法
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Application No.: US14061615Application Date: 2013-10-23
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Publication No.: US09543373B2Publication Date: 2017-01-10
- Inventor: Shih-Wei Liang , Hsin-Yu Pan , Kai-Chiang Wu , Ching-Feng Yang , Ming-Kai Liu , Chia-Chun Miao
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/367 ; H01L23/00 ; H01L49/02 ; H01L25/065 ; H01L23/488 ; H01L21/48 ; H01L23/538 ; H05K1/18 ; H05K3/46 ; H01L23/522 ; H01L23/498

Abstract:
A semiconductor structure includes a three dimensional stack including a first semiconductor die and a second semiconductor die. The second semiconductor die is connected with the first semiconductor die with a bump between the first semiconductor die and the second semiconductor die. The semiconductor structure includes a molding compound between the first semiconductor die and the second semiconductor die. A first portion of a metal structure over a surface of the three dimensional stack and contacting a backside of the second semiconductor die and a second portion of the metal structure over the surface of the three dimensional stack and configured for electrically connecting the three dimensional stack with an external electronic device.
Public/Granted literature
- US20150108635A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2015-04-23
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