Invention Grant
US09547034B2 Monolithic integrated circuit die having modular die regions stitched together 有权
具有拼接模块的单片集成电路芯片

  • Patent Title: Monolithic integrated circuit die having modular die regions stitched together
  • Patent Title (中): 具有拼接模块的单片集成电路芯片
  • Application No.: US13935066
    Application Date: 2013-07-03
  • Publication No.: US09547034B2
    Publication Date: 2017-01-17
  • Inventor: Rafael C. Camarota
  • Applicant: Xilinx, Inc.
  • Applicant Address: US CA San Jose
  • Assignee: XILINX, INC.
  • Current Assignee: XILINX, INC.
  • Current Assignee Address: US CA San Jose
  • Agent W. Eric Webostad; Steven Roberts
  • Main IPC: G01R31/26
  • IPC: G01R31/26 G01R31/3185 G01R31/317 H03K19/177
Monolithic integrated circuit die having modular die regions stitched together
Abstract:
An apparatus for a monolithic integrated circuit die is disclosed. In this apparatus, the monolithic integrated circuit die has a plurality of modular die regions. The modular die regions respectively have a plurality of power distribution networks for independently powering each of the modular die regions. Each adjacent pair of the modular die regions is stitched together with a respective plurality of metal lines.
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