Invention Grant
- Patent Title: Array modeling for one or more analog devices
- Patent Title (中): 一个或多个模拟设备的阵列建模
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Application No.: US13596214Application Date: 2012-08-28
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Publication No.: US09547734B2Publication Date: 2017-01-17
- Inventor: Yang Chung-Chieh , Chih-Chiang Chang , Chung-Ting Lu
- Applicant: Yang Chung-Chieh , Chih-Chiang Chang , Chung-Ting Lu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsin-Chu
- Agency: Cooper Legal Group, LLC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Among other things, one or more techniques for creating an array model for analog device modeling are provided. In an embodiment, the array model represents a mean value or a standard deviation value of an analog device characteristic for an analog device based on a physical location of the analog device within a circuit layout, where the physical location is identified using a physical set of coordinates. The physical set of coordinates maps to an array set of coordinates of the array model. In this manner, a mean value and a standard deviation value are obtainable from the array model using the array set of coordinates. The mean value and the standard deviation value are usable to model the analog device, and thus a circuit within which the analog device is used, to obtain a more accurate or realistic prediction of operation or behavior, for example.
Public/Granted literature
- US20140067348A1 ARRAY MODELING FOR ONE OR MORE ANALOG DEVICES Public/Granted day:2014-03-06
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