Invention Grant
- Patent Title: Scaleable look-up table based memory
- Patent Title (中): 基于可扩展查询表的内存
-
Application No.: US14806962Application Date: 2015-07-23
-
Publication No.: US09548103B1Publication Date: 2017-01-17
- Inventor: Philip Pan , Andy L. Lee , Lu Zhou , Aniket Kadkol
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Fletcher Yoder, P.C.
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C11/418 ; G11C7/10 ; G11C11/419 ; G11C7/22 ; G11C7/12 ; G11C11/4094

Abstract:
An integrated circuit having a logic element that includes an array of storage elements convertibly functioning as either a configuration random access memory (CRAM) or a static random access memory (SRAM) is provided. The logic element includes first and second pairs of data paths having dedicated multiplexers. In one embodiment, the first and second pairs of data paths are multiplexed into bit lines of a row of the array. The logic element also includes a data path control block generating control signals for each of the dedicated multiplexers. The control signals determine whether the storage elements function as a CRAM or a SRAM. A method for selectively configuring a memory array between a CRAM mode and SRAM mode are provided.
Information query