Invention Grant
- Patent Title: Method for integrated circuit fabrication
- Patent Title (中): 集成电路制造方法
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Application No.: US14625341Application Date: 2015-02-18
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Publication No.: US09548209B2Publication Date: 2017-01-17
- Inventor: Ching-Fang Yu , Chia-Ching Huang , Ting-Hao Hsu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: B44C1/22
- IPC: B44C1/22 ; C03C15/00 ; C03C25/68 ; C23F1/00 ; H01L21/308 ; H01L21/263 ; G03F7/20 ; H01L21/027

Abstract:
Provided is an integrated circuit (IC) fabrication method. The method includes receiving a mask, the mask having a plurality of dies and receiving a wafer, the wafer having a resist layer. The method further includes exposing the resist layer using the mask with a fraction radiation dose thereby forming a first plurality of images; re-positioning the mask relative to the wafer; and exposing the resist layer using the mask with another fraction radiation dose. A second plurality of images is formed, wherein a portion of the second plurality of images is superimposed over another portion of the first plurality of images.
Public/Granted literature
- US20150162204A1 Method for Integrated Circuit Fabrication Public/Granted day:2015-06-11
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