Invention Grant
- Patent Title: Three dimensional circuit including shielded inductor and method of forming same
- Patent Title (中): 包括屏蔽电感的三维电路及其形成方法
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Application No.: US14712940Application Date: 2015-05-15
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Publication No.: US09548267B2Publication Date: 2017-01-17
- Inventor: Ming Hsien Tsai , Hsieh-Hung Hsieh , Tzu-Jin Yeh , Chewn-Pu Jou , Sa-Lly Liu , Fu-Lung Hsueh
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW
- Agency: Duane Morris LLP
- Main IPC: H01L27/08
- IPC: H01L27/08 ; H01L23/522 ; H01L49/02 ; H01L23/538 ; H01L23/58 ; H01L27/06 ; H01L27/07 ; H01L23/48 ; H03F1/26 ; H03F3/04 ; H01L27/092
Abstract:
The three dimensional (3D) circuit includes a first tier including a semiconductor substrate, a second tier disposed adjacent to the first tier, a three dimensional inductor including an inductive element portion, the inductive element portion including a conductive via extending from the first tier to a dielectric layer of the second tier. The 3D circuit includes a ground shield surrounding at least a portion of the conductive via. In some embodiments, the ground shield includes a hollow cylindrical cage. In some embodiments, the 3D circuit is a low noise amplifier.
Public/Granted literature
- US20150249051A1 THREE DIMENSIONAL CIRCUIT INCLUDING SHIELDED INDUCTOR AND METHOD OF FORMING SAME Public/Granted day:2015-09-03
Information query
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